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| TC6371AF specification rev. 1.8 02/01/22 total 58 page no.1 toshiba confidential pci to sd memory card / smartmedia? interface controller TC6371AF outline rev. 1.8 2002-01-22
TC6371AF specification rev. 1.8 02/01/22 total 58 page no.2 toshiba confidential revision history title: TC6371AF specification ? ? rev no. date contents parts revised app?d 1.00 '00-09-08 issued s.ueta t. ta k a d a 1.01 '01-03-26 mentioned ?5.2.2pci interface dc characteristics?. mentioned ?5.3.1pci clock ac characteristics?. page 34 page 40 t. mu r a k a m i t. ta k a d a 1.02 '01-04-02 symbol ?topr? is raised to 70c from 60c ta is changed to ?0-70c? from ?0-60c? page 33 page 35-52 s . u e t a t. ta k a d a 1.03 '01-04-18 recommended resistance of sdcd3 line is changed to 100 k ? pull-up from 510 k ? pull-down. added 4.11 item page 32 page 33 s . u e t a t. ta k a d a 1.04 '01-04-25 low active signals are unified as # xxxx. (ex. sdcd# ? #sdcd) modified recommended resistance of sdcd3-0 and sdcmd case of mmc not supported. (100k ? ? 47k ? ) page 32 s . u e t a t. ta k a d a 1.1 '01-05-17 modified a comment of [4.7 suspend state ]. modified recommended resistance of sdcd2-0 and sdcmd case of mmc not supported. (47k ? ? 100k ? ) added current dissipation characteristics page 26 page 32 page 41 s . u e t a t. ta k a d a 1.2 '01-07-20 added [4.12 processing unused interface external pins]. modified recommended resistance of #sdcd and sdwp. (100k ? ? 10k ? ) page 34-35 page 32 s . u e t a t. ta k a d a 1.3 '01-08-17 added [6 package outline]. page 56 s.ueta t. ta k a d a 1.4 '01-08-31 added smartmedia dc spec. for #smlock, #smejct and #smled. page 38 s.ueta t.takada 1.5 '01-09-03 to be slimed files. s.ueta t. ta k a d a 1.6 '01-10-02 added the comment regarding subsystem vendor id and subsystem device id. page17,19 s.ueta t.takada 1.61 '01-11-09 corrected the written. page17,19 (red letters) s.ueta t. ta k a d a 1.62 '01-11-26 corrected the written. page27 (red letters) s.ueta t. ta k a d a 1.7 '02-01-09 regarding serial rom i/f, specified that only 4k bits serial rom be supported. added #smled signal specification. page5 (red letters) page36 s.ueta t. ta k a d a 1.8 '02-01-22 modified the explanation of clk32 signal. added gpio interface specification. page21 (red letters) page36 s.ueta t. ta k a d a TC6371AF specification rev. 1.8 02/01/22 total 58 page no.3 toshiba confidential contents 1 outline ___________________________________________________________________________________ 5 1.1 chip specifications ______________________________________________________________________ 5 1.2 low power dissipation ___________________________________________________________________ 5 1.3 general specifications ___________________________________________________________________ 5 2 block diagram______________________________________________________________________________ 6 3 signals ___________________________________________________________________________________ 7 3.1 pin assignments ________________________________________________________________________ 7 3.2 pin signals ____________________________________________________________________________ 8 3.3 power supply, gnd, and nc pins (26) _____________________________________________________ 14 3.4 interface pin summary __________________________________________________________________ 14 4 description of functions_____________________________________________________________________ 15 4.1 pci device interface____________________________________________________________________ 15 4.1.1 resource space ____________________________________________________________________ 15 4.2 register map__________________________________________________________________________ 17 4.2.1 sd host controller configuration register ______________________________________________ 17 4.2.2 sd control register ________________________________________________________________ 18 4.2.3 smartmedia? host controller configuration register _____________________________________ 19 4.2.4 smartmedia? control register _______________________________________________________ 20 4.3 clock / reset__________________________________________________________________________ 21 4.3.1 clocks ___________________________________________________________________________ 21 4.3.2 reset ____________________________________________________________________________ 21 4.4 detection of insertion/removal of sd card/ smartmedia tm _____________________________________ 22 4.4.1 detection of insertion/removal of sd card ______________________________________________ 22 4.4.2 detection of insertion/removal of smartmedia tm _________________________________________ 22 4.5 interrupts_____________________________________________________________________________ 23 4.5.1 interrupt sources by sd card _________________________________________________________ 23 4.5.2 interrupt sources by smartmedia tm ____________________________________________________ 23 4.6 card slot power supply control___________________________________________________________ 24 4.6.1 sd card slot power supply control____________________________________________________ 24 4.6.2 smartmedia? slot power supply control_______________________________________________ 24 4.7 suspend state _________________________________________________________________________ 25 4.8 power management ____________________________________________________________________ 26 4.8.1 pme register structure _____________________________________________________________ 26 4.8.2 pme state ________________________________________________________________________ 26 4.8.3 pme context register ______________________________________________________________ 27 4.8.4 #pme generation __________________________________________________________________ 28 4.8.5 #pme pin ________________________________________________________________________ 28 4.8.6 #pwrst _________________________________________________________________________ 29 4.8.7 vaux in d3cold state _______________________________________________________________ 30 4.9 serial rom interface ___________________________________________________________________ 31 4.10 pulled-up/pulled-down resistors _______________________________________________________ 32 4.10.1 sd card interface __________________________________________________________________ 32 4.10.2 smartmedia? interface _____________________________________________________________ 32 4.11 ? connection example of sd card/smartmedia? socket _________________________________________ 33 TC6371AF specification rev. 1.8 02/01/22 total 58 page no.4 toshiba confidential 4.12 ? processing unused interfaceexternal pins___________________________________________________ 34 4.12.1 processing pins (smartmedia? interface unsupported) _____________________________________ 34 4.12.2 processing pins (sd interface unsupported)_______________________________________________ 35 4.13 ? #smled signal _______________________________________________________________________ 36 4.14 ? gpio interface specification _____________________________________________________________ 36 5 electrical characteristics ____________________________________________________________________ 37 5.1 absolute maximum ratings ______________________________________________________________ 37 5.2 dc characteristics _____________________________________________________________________ 37 5.2.1 power supply voltage: recommended conditions_________________________________________ 37 5.2.2 pci interface dc characteristics ______________________________________________________ 38 5.2.3 smartmedia? interface dc characteristics______________________________________________ 39 5.2.4 smartmedia? power supply control dc characteristics ___________________________________ 39 5.2.5 sd card interface pin dc characteristics _______________________________________________ 40 5.2.6 sd card power supply control dc characteristics________________________________________ 40 5.2.7 system interface pin (5 v-tolerant) dc characteristics ____________________________________ 41 5.2.8 gpio interface pin dc characteristics__________________________________________________ 42 5.2.9 test pin dc characteristics _________________________________________________________ 42 5.2.10 current dissipation characteristics ____________________________________________________ 43 5.3 ac characteristics _____________________________________________________________________ 44 5.3.1 pci interface signal ac characteristics_________________________________________________ 44 5.3.2 smartmedia? interface signal ac characteristics ________________________________________ 48 5.3.3 sd card interface signal ac characteristics _____________________________________________ 55 5.3.4 system interface signal ac characteristics ______________________________________________ 56 6 package outline____________________________________________________________________________ 57 TC6371AF specification rev. 1.8 02/01/22 total 58 page no.5 toshiba confidential 1 outline the TC6371AF is an sd memory card/smartmedia tm controller lsi with a 32-bit pci bus interface. this product conforms to sd memory card physical layer specifications as well as to smartmedia tm electrical and physical format specifications. the TC6371AF can also be used with all power supplies for memory card interfaces. when the memory card is inserted, TC6371AF automatically detects the card type and the power supply in use. in addition to supporting a clkrun function and advanced configuration power interface (acpi), the TC6371AF supports a pci power management-compliant pme, giving the product fully developed power management functions that allow it to minimize the system?s power dissipation. with such features as subsystem id and subsystem vendor id supplied from external serial rom, the TC6371AF can be used as a pci card or cardbus card lsi. 1.1 chip specifications ? 0.35- m cmos process ? number of gates: 80,000 approx. ? 0.4-mm pitch, 128-pin qfp package (lqfp128-p-1414b) 1.2 low power dissipation ? conforms to pci power management specifications (supports #pme *) ? supports clockrun (mobile pc/pci) ? internal gate clock design 1.3 general specifications ? conforms to pci power management specification revision 1.1 ? conforms to pci local bus specification revision 2.2 * ? supports remote wakeup feature (#pme-compliant) ** ? supports pci interrupts (int) ? supports pci clkrun ? supports suspend state ? supports plug & play ? operating frequency: pci (33 mhz max) ? supports lsi mic2563 which controls power supply ? supports subsystem id and subsystem vendor id from 4k bits eeprom (3-line serial rom interface) (only 4k bits eeprom supports) ? supports 3.3-v pci interface ? conforms to sd memory card physical layer specifications (ver. 1.0) operating frequency 16 mhz max offers multimedia card read/write supports 3.3 v offers multi-block write/read ? conforms to smartmedia tm electrical specifications (ver. 1.20) and physical format specifications (ver. 1.20), supporting: supports 3.3-v smartmedia tm (5.0 v not supported) supports hardware ecc * the minimum input voltage level of "pciclk" ?#pcirst?shall not exceed 0.7 times ofvcc.vih(min)= 0,7*vcc **as of january. 2002, the sd/mmc/smartmedia tm driver does not perform any functions by enabling #pme. smartmedia tm is a registered trademark of toshiba corporation. view of TC6371AF TC6371AF specification rev. 1.8 02/01/22 total 58 page no.6 toshiba confidential 2 block diagram cpu north bridge sd memory card multimedia card ? pci target control vga interrupt control system memory ? pci bus pci bus pci bus pci bus TC6371AF south bridge sd memory card control power management int int int intx x x x sd control register smartmedia? control register power control power switch ? power control #pme # pme #pme # pme smartmedia? control smartmedia? ? ? rom interface serial rom TC6371AF specification rev. 1.8 02/01/22 total 58 page no.7 toshiba confidential 3 signals 3.1 pin assignments qfp128 matrix diagram smd5 smd3 smd6 smd2 vdd smd7 smd1 sdcmd smlvd vss smd0 sdcd3 #smwp sdcd2 #smrb vdd #smwe #smre smale #smce vss smcle #smejsw #smwpd smvc3en rsvo0 vdd sdpwr rom_cs rom_sk rom_d vss 97 64 tsti3 sdclk 98 63 tsti2 smd4 99 62 tsti1 #smcd 100 61 tsti0 sdcd0 101 60 vdd sdcd1 102 59 clk32 vdd 103 58 fcmode #sdcd 104 57 #suspend sdwp 105 56 #pwrst #smejct 106 55 #clkrun #smled 107 54 vss vss 108 53 ad0 # smlock 109 52 ad1 gpio0 110 51 ad2 gpio1 111 50 ad3 gpio2 112 49 vdd vdd 113 48 ad4 gpio3 114 47 ad5 gpio4 115 46 ad6 gpio5 116 45 ad7 gpio6 117 44 vss vss 118 43 cbe0 gpio7 119 42 ad8 idsel1 120 41 ad9 #inta 121 40 ad10 #intb 122 39 vdd #pcirst 123 38 ad11 vdd 124 37 ad12 pciclk 125 36 ad13 nc 126 35 ad14 nc 127 34 ad15 #pme 128 33 vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 TC6371AF lqfp128-pkg (top view) TC6371AF specification rev. 1.8 02/01/22 total 58 page no.8 toshiba confidential 3.2 pin signals pci interface (50-pin) name pin io vcc (v) function ad31 2 ad30 3 ad29 4 ad28 5 ad27 7 ad26 8 ad25 9 ad24 10 ad23 14 ad22 15 ad21 16 ad20 18 ad19 19 ad18 20 ad17 21 ad16 22 ad15 34 ad14 35 ad13 36 ad12 37 ad11 38 ad10 40 ad9 41 ad8 42 ad7 45 ad6 46 ad5 47 ad4 48 ad3 50 ad2 51 ad1 52 ad0 53 io 3.3 pci address/data bus #cbe3 11 #cbe2 31 #cbe1 32 #cbe0 43 io 3.3 pci bus command/byte enable. specifies bus commands at the pci cycle address phase. specifies the byte enable that indicates which byte lane of the 32 bits to use for sending data at the data phase. par 30 o 3.3 pci bus parity. parity bit for even-number parity checks on the pci address/data bus and bus command line. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.9 toshiba confidential pin signals (continued) pci interface (continued) name pin io vcc (v) function #frame 24 i 3.3 pci cycle frame. driven by the initiator, this signal indicates that the bus cycle is in progress. when the signal is asserted, address and bus command output starts. when de-asserted, the signal indicates that the next data transfer phase is the final data transfer. #irdy 25 i 3.3 enables pci initiator. indicates that the initiator is ready for data transfer. the r/w data are transferred when signal asserted. #trdy 26 o 3.3 enables pci target. indicates that the target is ready for data transfer. the r/w data are transferred when signal asserted. #stop 29 o 3.3 terminates the pci cycle. the target uses this signal to ask the initiator to terminate processing that is currently in progress. supports three types of termination: retry/disconnect/target abort. idsel0 13 i 3.3 selects the pci bus initialization device (id). asserted to specify the TC6371AF as the target device during a configuration access. this signal is used for sd card controller functions. when the fcmode pin is set to h, this signal is used for the sd card/smartmedia? controller multifunction device feature. idsel1 120 i 3.3 selects the pci bus initialization device (id). asserted when the TC6371AF is specified as the target device during configuration access. this signal is used for smartmedia? controller functions. when the fcmode pin is set to h, the TC6371AF operates as a multifunction device using idsel0 and therefore this signal does not function. (in multifunction mode, pull up this pin.) #clkrun 55 io 3.3 runs the pci clock. can request a stop or slowdown of the pci clock. #devsel 27 o 3.3 selects the pci device. asserted by the TC6371AF in response to bus access. pciclk 125 i 3.3 pci bus clock. inputs a 33-mhz clock. all processing on the pci bus is on the pciclk rising edge. #pcirst 123 i 3.3 resets pci bus. asserted when power is turned on and or when system has been reset. #inta 121 o (od) *1 3.3 pci interrupt inta. #intb 122 o (od) *1 3.3 pci interrupt intb. #pme 128 o (od) *1 3.3 #pme interrupt signal *1: level cannot be converted. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.10 toshiba confidential pin signals (continued) sd card interface (8 pins) name pin io vcc (v) function sdcd3 85 sdcd2 83 sdcd1 102 sdcd0 101 io 3.3 sd card data bus sdcmd 89 io 3.3 sd command sdclk 98 o 3.3 sd card clock #sdcd 104 i 3.3 sd card detection sdwp 105 i 3.3 sd card write-protect. when h, sd card write-protected. sd card power supply controller (one pin) name pin io vcc (v) function sdpwr 69 o 3.3 controls sd card power supply. 3.3-v enable signal. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.11 toshiba confidential pin signals (continued) smartmedia? interface (22 pins) name pin io vcc (v) function smd7 91 smd6 94 smd5 96 smd4 99 smd3 95 smd2 93 smd1 90 smd0 86 io 3.3 data smcle 75 o (3state) enables the command latch. smale 78 o (3state) enables the address latch. #smce 77 o (3state) enables the chip. #smwe 80 o (3state) enables a write. #smre 79 o (3state) enables a read. #smwp 84 o (3state) protects against write. #smrb 82 i busy #smcd 100 i detects card. smlvd 88 i detects low voltage. #smwpd 73 i write-protection seal when l, a write-protected media is inserted. #smejsw 74 i ejects request. when h, a media is inserted. when l, no media is inserted. changes detection control to one where l indicates a media is inserted by setting bit 7 of the smartmedia? host controller?s configuration register 63h. #smled 107 o (od) *1 turns on the led. #smlock 109 o (od) *1 lock mode #smejct 106 o (od) *1 eject response *1: level cannot be converted. smartmedia? power supply control (2 pins) name pin io vcc (v) function smvc3en 72 o 3.3 parallel power supply control. vcc 3.3 v enable signal. rsvo0 71 o 3.3 leave pin open. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.12 toshiba confidential pin signals (continued) system interface (4 pins) name pin io vcc (v) function clk32 59 i 3.3 detects card or allow interruptions when pciclk stops. #pwrst 56 i 3.3 power-on reset signal input. #suspend 57 i 3.3 when #suspend is low, prevents throughput of data input from the sd card and smartmedia tm . control signals output from TC6371AF are controlled at non-active level. fcmode 58 i 3.3 function mode signal. when the fcmode pin is set to l, the TC6371AF operates as a single-function pci device. (idsel0 is used for the sd card controller functions, idsel1 for the smartmedia? functions.) when the fcmode pin is set to h, TC6371AF operates as a multifunction device. (only idsel0 is valid. function0 controls the sd card controller functions; function1 controls the smartmedia? controller functions.) serial rom interface (3 pins) name pin io vcc (v) function rom_cs 68 o 3.3 serial rom interface: chip selection connect to serial rom chip select (cs) pin. set tsti[3-0] to be ?0010? when the serial rom interface applied. leave the pin open when the serial rom interface not applied,. rom_sk 67 o 3.3 serial rom interface: clock connect to serial rom clock pin (sk). leave the pin open when the serial rom interface not applied. rom_d 66 io 3.3 serial rom interface: data connect to the serial rom data input/output pin. pull up the pin with a 100-k ? resistor when the serial rom interface not applied. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.13 toshiba confidential gpio interface (8 pins) name pin io vcc (v) function gpio0 110 io 3.3 general-purpose port 0. pull up this pin. gpio1 111 io 3.3 general-purpose port 1. pull up this pin. gpio2 112 io 3.3 general-purpose port 2. set to low when 8-bit rom selected or set to high when 16-bit rom selected in rom interface mode. pull up this pin .when the serial rom interface is not applied, gpio3 114 io 3.3 general-purpose port 3. pull up this pin. gpio4 115 i 3.3 general-purpose port 4. set to low. gpio5 116 i 3.3 general-purpose port 5. set to high. gpio6 117 i 3.3 general-purpose port 6. set to low. gpio7 119 i 3.3 general-purpose port 7. set to low. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.14 toshiba confidential pin signals (continued) test pins (4 pins) name pin io vcc (v) function tsti0 61 tsti1 62 tsti2 63 tsti3 64 i 3.3 test mode signals 3, 2, 1, 0 used in test mode. set tsti[3-0] to ?0000? in normal operating mode. set tsti[3-0] to ?0010? when using the serial rom interface. 3.3 power supply, gnd, and nc pins (26) name pin function vss 1, 12, 23, 33, 44, 54, 65, 76, 87, 97, 108, 118 gnd vdd 6, 17, 28, 39, 49, 60, 70, 81, 92, 103, 113, 124 3.3v nc 126, 127 not connected. 3.4 interface pin summary interface number of pins remarks pci 50 sd card 8 sd card power supply control 1 smartmedia? 22 smartmedia? power supply control 2 system 19 system interface, serial rom interface, gpio interface, test pins sub total 103 power supply 12 gnd 12 not connected (nc) 2 leave open. total 128 TC6371AF specification rev. 1.8 02/01/22 total 58 page no.15 toshiba confidential 4 description of functions 4.1 pci device interface ? address decode timing medium ? delayed transaction supported ? lock# not supported ? perr#, serr# not supported ? resource space 4.1.1 resource space the TC6371AF has the following resource space: ? sd host controller configuration register space ? sd control register space ? smartmedia ? host controller configuration register space ? smartmedia ? control register space sd host controller /smartmedia ? host controller configuration register space the configuration space of the host controllers is set by external pins idsel0, idsel1, and fcmode. fcmode pin sd host controller configuration register space smartmedia? host controller configuration register space 0 single-function mode determined by idsel0 header-type 00h determined by idsel1 header-type 00h 1 multifunction mode determined by idsel0 function no. 0 header-type 80h idsel1 pulled up determined by idsel0 function no. 1 header-type 80h idsel1 pulled up note: when using only either the sd host controller function or the smartmedia? host controller function in systems using the TC6371AF, set single-function mode and mask the configuration space of the host controller you don?t need. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.16 toshiba confidential ? sd control register space use the base address register (config offset: 10h) of the sd host controller?s configuration register for accessing the resources in the sd control register space. this allows you to set the sd control register space to any memory space. however, the sd control register space cannot be set to i/o resource space. sd host controller configuration registers base address : offset ? 10 h ? ? ? ? ? ? ffh host memory space sd control register ? ? ? ? ? ? ? ? ? offset base address + 00 h ? base address + ff h ? ? ? ? smartmedia? control register space use the base address register (config offset: 10h) of the smartmedia ? host controller?s configuration register for accessing the resources in the smartmedia ? control register space. this allows you to set smartmedia ? control register space to any memory or i/o space. smartmedia host controller configuration registers base address : offset 10 h ffh host memory space smartmedia control register : : : : : : : : offset base address + 00 h base address + 07 h TC6371AF specification rev. 1.8 02/01/22 total 58 page no.17 toshiba confidential 4.2 register map the TC6371AF incorporates an sd host controller registers and a smartmedia ? host controller registers. ? sd host controller configuration register ? sd control register ? smartmedia ? host controller configuration register ? smartmedia ? control register 4.2.1 sd host controller configuration register 31 23 15 07 00 port device id (0803h) vendor id (1179h) 00h status (0210h) command (0000h) 04h class code (088000h) revision id (02h) 08h header type cache line size 0ch sd card register base address 10h 14h-27h cispt 28h subsystem device id (0001h) *1 subsystem vendor id (1179h) *1 2ch 30h capability pointer 34h 38h interrupt pin interrupt line 3ch sd clock mode pci clock control gated clock control 40h pin status 44h *2 power control 48h card detect reset *2 card detect mode 4ch 50h-7fh power management capabilities (pmc) next item ptr capability id 80h data pmcsr pci to pci bridge support (pmcsr_bse) power management control/status (pmcsr) 84h *2 pme trigger enable 88h 8ch-9fh *2 cis a0h-efh f0h-f7h test f8h single function *2 pm write protect write protect fch *1: regarding subsystem vendor id and subsystem device id, the default values of these register are the toshiba?s id. in the case of using TC6371AF, please set these register to your id. please set your id by bios as followings. (1) set 01h to write protect register(config.fch). (2) set your id to subsystem vendor id and subsystem device id register. (3) set 00h to write protect register(config.fch). *2: pme context register TC6371AF specification rev. 1.8 02/01/22 total 58 page no.18 toshiba confidential 4.2.2 sd control register offset 15-08 bit 07-00 bit offset 15-08 bit 07-00 bit 02h sd_port 00h sd_cmd 06h sd_arg1 04h sd_arg0 0ah sd_length 08h sd_stop 0eh sd_rsp1 0ch sd_rsp0 12h sd_rsp3 10h sd_rsp2 16h sd_rsp5 14h sd_rsp4 1ah sd_rsp7 18h sd_rsp6 1eh sd_info2 1ch sd_info 22h sd_info2_mask 20h sd_info_mask 26h sd_width 24h sd_clk 2ah --- 28h sd_option 2eh --- 2ch --- 32h sd_buf1 30h sd_buf0 36h --- 34h --- 3ah --- 38h --- 3eh --- 3ch --- 42h --- 40h --- 46h --- 44h --- 4ah --- 48h --- 4eh --- 4ch --- 52h --- 50h --- 56h --- 54h --- 5ah --- 58h --- 5eh --- 5ch --- 62h | 7eh --- 60h | 7ch --- 82h --- 80h --- 86h --- 84h --- 8ah --- 88h --- 8eh --- 8ch --- 92h --- 90h --- 96h --- 94h --- 9ah --- 98h --- 9eh --- 9ch --- a2h --- a0h --- a6h --- a4h --- aah --- a8h --- aeh --- ach --- b2h --- b0h --- b6h --- b4h --- bah --- b8h --- beh --- bch --- c2h | deh --- c0h | dch --- e2h core_rev e0h soft_rst e6h buf_adr e4h --- eah --- e8h resp_header eeh --- ech --- f2h --- f0h --- f6h --- f4h --- fah --- f8h --- feh revision fch --- TC6371AF specification rev. 1.8 02/01/22 total 58 page no.19 toshiba confidential 4.2.3 smartmedia? host controller configuration register 31 23 15 07 00 port device id (0804h) vendor id (1179h) 00h status (0490h) command (0000h) 04h class code (088000h) revision id (02h) 08h header type 0ch smartmedia? controller register base address 10h 14h-27h cis pointer 28h subsystem device id(0001h) subsystem vendor id(1179h) 2ch 30h capability pointer 34h 38h interrupt pin interrupt line 3ch 40h-47h *2 event control *2 pme enable *2 int enable 48h *2 clkrun control 4ch 50h-57h *2 debug 58h 5ch-5fh *2 smartmedia? detect control *2 smartmedia? power supply control *2 smartmedia? transaction control 60h 64h-7fh *2 power management capabilities (pmc) *2 next item ptr *2 capability id 80h *2 data *2 pmcsr pci to pci bridge support (pmcsr_bse) *2 power management control/status (pmcsr) 84h 88h-9fh *2 cis a0h-efh *2 rom control *2 rom index port *2 rom data port f0h f4h-fbh *2 monitor select *2 configuration control fch *1: regarding subsystem vendor id and subsystem device id, the default values of these register are the toshiba?s id. in the case of using TC6371AF, please set these register to your id. please set your id by bios as followings. (1) set 01h to configuration control register(config.fch). (2) set your id to subsystem vendor id and subsystem device id register. (3) set 00h to configuration control register(config.fch). *2 : pme context register TC6371AF specification rev. 1.8 02/01/22 total 58 page no.20 toshiba confidential 4.2.4 smartmedia? control register config-60h bit4=1 config-60h bit4=0 offset1 offset2 register name r/w 00h 03h-00h data register rw 01h - reserved - 02h(write) 04h(read/write) *mode register w(r/w) 02h(read) 05h *status register r 04h 06h *interrupt status register r 06h 07h *interrupt mask register rw 03h, 05h, 07h - reserved - * pme context register the offset of this register set varies according to the status of the bit that controls the smartmedia ? control register?s high-speed mode (config 60h bit 4). (setting bit 4 = 0 enables 32/16-bit access to the data register.) TC6371AF specification rev. 1.8 02/01/22 total 58 page no.21 toshiba confidential 4.3 clock / reset 4.3.1 clocks the TC6371AF has two pins for input clocks: pciclk and clk32. (1) pciclk: pci clock input (33 mhz max) pci interface and internal operation reference clock. (2) clk32: 32-khz clock input used as detecting insertion and removal of sd card and smartmedia and an interrupt detection clock and for event detection in d3 state. the interrupt signal, implied insertion or detachment, shall be generated synchronous to this clock signal. note that if clk32 is stopped, the interrupt detector does not operate while TC6371AF is suspended or in d1-3 state set according to the pci bus power management interface specifications. 4.3.2 reset the TC6371AF uses the following two reset signals. (1) #pcirst: pci reset signal. asserted at power on and at a transition to d3cold. when the input destination of this signal is set to d3 state, the contents of the context register are saved and not cleared even when #pcirst is asserted. (2) #pwrst: power-on reset signal. asserted at power on. asserting #pwrst clears all the TC6371AF?s internal registers. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.22 toshiba confidential 4.4 detection of insertion/removal of sd card/ smartmedia tm 4.4.1 detection of insertion/removal of sd card the TC6371AF detects insertion and removal of the sd card using #sdcd and sdcd3. when #sdcd is low or sdcd3 is high, the sd card is inserted. when #sdcd is high or sdcd3 is low, the sd card is withdrawn. the following is an example of how to detect insertion of the sd card. 1. the TC6371AF detects that #sdcd is low, then turns power on to the sd card socket. 2. the TC6371AF detects that the sdcd3 pin is high. the following is an example of how to detect removal of the sd card. 1. the TC6371AF detects that #sdcd is high, or sdcd3 is low. 2. the TC6371AF turns power off. * removing the sd card while the card is being accessed may damage the card. the sd card insertion/removal status can be checked by bit 9, 8, 4, and 3 of 1ch sd port register. 4.4.2 detection of insertion/removal of smartmedia tm the TC6371AF can detect insertion and removal of the smartmedia tm using #smcd and #smejsw. when #smcd or #smejsw is low, the smartmedia tm is inserted. when #smcd or #smejsw is high, the smartmedia tm is withdrawn. when the bit 7 of the smartmedia tm host controller configuration register 63h set to ?1? and when #smejsw is high, this indicates that the smartmedia tm is inserted. when the bit 6 of smartmedia tm host controller configuration register 63h set to ?1?, detection of smartmedia tm has been masked using #smejsw. the following is an example of how to detect insertion of the smartmedia tm . 1. the TC6371AF detects that #smcd is low, then #smejsw is low. 2. the TC6371AF then turns power on to the smartmedia tm socket. the following is an example of how to detect removal of the smartmedia tm . 1. the TC6371AF detects that #smejsw is high, then #smcd is high. 2. the TC6371AF then turns power off. * removing the smartmedia tm card when the smartmedia tm is being accessed may damage the smartmedia tm . the smartmedia tm insertion status can be checked using status bits 3 and 2 and interrupt status bit 3 of the smartmedia tm control register. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.23 toshiba confidential 4.5 interrupts when the TC6371AF detects the following interrupt sources, the TC6371AF asserts interrupt signals (#inta, #intb, #pme). the power management register has to be set in order to get #pme output. 4.5.1 interrupt sources by sd card interrupt sources by the sd card are as listed below: normal interrupts ? sd card insertion interrupt by #sdcd * ? sd card removal interrupt by #sdcd * ? sd card insertion interrupt by sdcd3 * ? sd card removal interrupt by sdcd3 * ? interrupt by write enable buffer signal ? interrupt by read enable buffer signal ? interrupt by r/w end signal ? interrupt by response end signal error interrupts ? timeout error (command) interrupt ? buffer underflow interrupt ? buffer overflow interrupt ? timeout error (data) interrupt ? end bit error interrupt ? crc error interrupt ? cmd index error interrupt 4.5.2 interrupt sources by smartmedia tm interrupt sources by the smartmedia tm are as listed below: ? smartmedia tm insertion interrupt ? smartmedia tm removal interrupt ? interrupt by #smejsw signal ? interrupt when #smrb signal changes from low to high * interrupt sources which can be output to #pme. other interrupt sources can only be output to #inta or #intb. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.24 toshiba confidential 4.6 card slot power supply control the TC6371AF is designed so that it can be connected to mic2563 (power supply control lsi). an example of application circuit is shown below. 4.6.1 sd card slot power supply control setting the power control register (config offset: 48h) enables to control the power supply of sd card. parallel power supply control signal signal name function pin sdpwr controls 3.3-v vcc for sd card 69 4.6.2 smartmedia? slot power supply control there are two modes for controlling power supply to the smartmedia tm slot: manual power supply control mode and automatic power supply control mode. those modes are switched using the bit 7 of the smartmedia tm host controller configuration register at 62h. in manual power supply control mode, bits 3 and 2 of the smartmedia tm control register (offset: 02h) are used. in automatic power supply control mode, when the smartmedia tm is inserted, power is automatically turned on. when the smartmedia tm is removed, power is turned off. as of january. 2002, the smartmedia tm driver uses a manual power supply control. parallel power supply control signal signal name function pin smvc3en controls 3.3-v vcc for smartmedia? 72 3.3v vcc (3.3v) vcc (3.3v) system power supply ? vcc3en vcc5en en0 en1 vc3en vc5en en0 en1 ? ? ? ? mic2563 smvc3en TC6371AF TC6371AF TC6371AF TC6371AF sdpwr smartmedia slot sd card/mmc slot v cc gnd TC6371AF specification rev. 1.8 02/01/22 total 58 page no.25 toshiba confidential 4.7 suspend state when #suspend is low, TC6371AF prevents throughput of data input from the sd card and smartmedia tm . control signals, output from TC6371AF, are set at non-active level. among pc system is suspend state, it is recommended that vdd of TC6371AF is power off. pcirst# suspend# x x phase i phase ii phase iii suspended pwrst# x phase iv pciclk vcc x x ? phase i: immediately after power on, #pcirst and #pwrst are l and #suspend is h. this state clears all circuits. ? phase ii: normal state with #pcirst de-asserted (h). ? phase iii: asserting #suspend sets suspend state. in this state, TC6371AF prevents throughput of signals input from the sd card and smartmedia tm .(*) in this state, TC6371AF cannot accept pci transactions. stopping the pciclk in suspend state reduces power consumption. ? phase iv: de-asserting #suspend restores TC6371AF to its normal operating state. * when #suspend is low, TC6371AF prevents current flow from vcc to gnd even if an intermediate potential is applied and TC6371AF masks out the input buffer signals as well. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.26 toshiba confidential 4.8 power management the TC6371AF supports a power management function conforming to pci bus power management interface specification revision 1.1 (pci-pm) for both the sd host controller and the smartmedia ? host controller. as of january. 2002, the sd/mmc/ smartmedia tm driver does not support a function which enables #pme and then performs output. 4.8.1 pme register structure to support the #pme, the TC6371AF registers conform to pci-pm specifications. pme registers config. offset power management capabilities (pmc) next item ptr capability id 80h data pmcsr pci to pci bridge support (pmcsr_bse) power management control/status (pmcsr) 84h 4.8.2 pme state the pci power management specifications are defined by five states (d0uninitialized d0active, d1, d2, d3hot, and d3cold) according to the power dissipation level. the TC6371AF can support all five states. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.27 toshiba confidential 4.8.3 pme context register in d3hot and d3cold states, TC6371AF supports pme. this allows the TC6371AF to detect wakeup events and assert #pme even when #pcirst is asserted and auxiliary power only (d3cold) is supplied. the required registers must therefore be saved. the following are the registers to be saved. 1) sd host controller configuration register ? offset 80-87h power management-related register ? offset 48h power control ? offset 4ch carddetect mode ? offset 88h pme trigger enable ? offset a0-efh cis ? offset fdh pm write protect sd io register ? offset 20h sd info mask register bit 9, 8, 4, 3 2) smart media? host controller configuration register ? offset 80-87h power management-related register ? offset 48h interrupt enable ? offset 49h pme enable ? offset 4ah event control ? offset 4ch clkrun control ? offset 5bh debug ? offset 60h smartmedia ? transaction control ? offset 62h smartmedia ? power supply control ? offset 63h smartmedia ? detect control ? offset a0-efh cis ? offset f0-f1h rom data port ? offset f2h rom index port ? offset f3h rom control ? offset fch configuration control ? offset ffh moniter select protect smartmedia ? control register ? offset 00-03h(00h) data register ? offset 04h(02h write) mode register ? offset 05h(02h read) status register ? offset 06h(04h) interrupt status register ? offset 07h(06h) interrupt mask register TC6371AF specification rev. 1.8 02/01/22 total 58 page no.28 toshiba confidential 4.8.4 #pme generation #pme is controlled (enabled/disabled) by the bit 8 (pme_en) of the power management control/status register (config offset: 84h). the status can be checked using the bit 15 of the register. when the TC6371AF detects card insertion/removal events or other interrupt events, the TC6371AF asserts #pme. the host controller controls registers to perform masking events and controlling flags. card type interrupt event pin name details sd host controller card insertion/removal #sdcd z sdcd3(cd) indicates insertion into/removal from card slot card insertion/removal #smcd z #smejsw indicates insertion into/removal from card slot smartmedia? host controller bsy release #smrb triggered by smartmedia? bsy release note: the TC6371AF uses a 32-khz clock (clk32) for the #pme control circuit. in d3hot/d3cold state or in d1/d2 state where the clkrun protocol operates, pciclk is stopped. therefore, when clk32 is not input, the TC6371AF?s #pme control circuit does not operate and #pme cannot be supported. 4.8.5 #pme pin the #pme pin outputs power management interrupts according to pci bus power management interface specifications. because the pin is an open drain output determined by pci bus power management interface specifications, it must be pulled up outside the TC6371AF. to prevent leak current from the external pull-up even when the power supply to this pin is off, the pin is open-drain output with failsafe measures. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.29 toshiba confidential 4.8.6 #pwrst the TC6371AF supports a #pme wakeup from d3cold state (in conformance to the pci 2.1 power-on reset sequence). the #pwrst signal is used to reset the pme context at power on. phase i phase iv phase ii phase ii phase v on vaux vcc on off t1 t2 t1 = (period until # pcirst raised - # pwrst raising) >= 0 t2 = (period until # pcirst raised - vcc is turned on again) > 1ms internal clear (general) x internal clear (pme context) x #pcirs t #pwrst x x internal state d0uninit ? ? d0 - d2 d3cold d0active- x d0uninit ? ? active off pciclk active off d3hot phase iii ? phase i: #pwrst and #pcirst are l when the vcc is turned on from power off. this state clears all circuits, including the pme context. ? phase ii: normal operating mode. #pwrst and #pcirst are both h. ? phase iii: setting pmcsr (config 84h) bits 1 and 0 to 11b sets the internal circuitry to d3hot. the pciclk is set to l except at a configuration access of pmcsr. setting bits 1 and 0 of pmcsr to 00b shifts to d0uninit state. asserting #pcirst at l shifts to phase iv d3cold. ? phase iv: asserting #pcirst at l sets the internal circuitry to d3cold. during this period, the power supply to vcc can be switched to vaux. at that time, vccp can be turned off, but because #pcirst is l and #pwrst is h, the pme context is saved. ? phase v: vccp is turned back on and pciclk goes active. while #pcirst is l, an internal (general) clear resets all circuits except the pme context. next, the TC6371AF returns to normal operating mode and the context can be written. #pwrst #pcirst pme context l x cleared h l saved h h normal notes: ~ if d3cold is not supported, set the #pcirst input signal level the same as that of the #pwrst input signal. ~ if d3cold is supported, it is desirable to switch vaux after asserting #pcirst. when restoring from d3cold state, make sure that the pciclk waveform is stable. TC6371AF specification rev. 1.8 02/01/22 total 58 page no.30 toshiba confidential 4.8.7 vaux in d3cold state because the TC6371AF supports a d3cold state, it requires an auxiliary power supply (vaux). the four systems that need the auxiliary power supply are: ? TC6371AF internal pme context (includes interrupt detection): vcc ? card slot power supply (power-sw) related control: vcc ? interface with host (system interface): vcc ? smartmedia ? slot/sd card slot interface: vcc toshiba recommends asserting #pcirst to be ?low" before moving to vaux operation. v aux schematic core TC6371AF smartmedia vaux cnt cnt power switch vcc vcc vcc vaux vcc host i/f smartmedia i/f sd card i/f sd card mmc pins that are active when operating on auxiliary power supply. host i/f sd i/f (vcc) smartmedia? (vcc) #pme #sdcd #smcd clk32 #smejsw #pwrst #suspend sdpwr smvc3en TC6371AF specification rev. 1.8 02/01/22 total 58 page no.31 toshiba confidential 4.9 serial rom interface the TC6371AF supports a serial rom interface. the rom interface is used to load the configuration register initial values (mainly subsystem id and subsystem vendor id initial values) and cis information when using the cardbus card. when using the serial rom interface, connect the interface as below and set the external pins tst1[3-0] to d010. toshiba verified operation of the serial rom interface using one ?nm93c66?(fairchild) with a 10-k ? resistor connected shown as the figure below. eeprom TC6371AF output data clock chip select rom_cs rom_sk rom_d input data TC6371AF specification rev. 1.8 02/01/22 total 58 page no.32 toshiba confidential 4.10 pulled-up/pulled-down resistors the TC6371AF needs pulled-up/pulled-down resistors attached to each interface. the following resistance values are provided as a guide. 4.10.1 sd card interface name pin io pull-up/ pull-down pull-up power supply resistance function sdcd3 85 pull-up sdvcc 47k ? sdcd2 83 pull-up sdvcc 100k ? sdcd1 102 pull-up sdvcc 100k ? sdcd0 101 io pull-up sdvcc 100k ? sd card data bus sdcmd 89 io pull-up sdvcc *1 33k *2 100k sd card / command *1: multimedia card supported *2: multimedia card not supported sdclk 98 o ? ? ? sd card clock #sdcd 104 i pull-up vcc 10k ? sd card detection sdwp 105 i pull-up vcc 10k ? sd card write-protection 4.10.2 smartmedia? interface name pin io pull-up/ pull-down pull-up power supply resistance function smd7 91 smd6 94 smd5 96 smd4 99 smd3 95 smd2 93 smd1 90 smd0 86 io pull-down ? 100k ? data smcle 75 o (3state) pull-down ? 100k ? enables the command latch. smale 78 o (3state) pull-down ? 100k ? enables the address latch. #smce 77 o (3state) pull-up smvcc 100k ? enables the chip. #smwe 80 o (3state) pull-up smvcc 100k ? enables a write. #smre 79 o (3state) pull-up smvcc 100k ? enables a read. #smwp 84 o (3state) pull-down ? 100k ? write-protection #smrb 82 i pull-up smvcc 10k ? busy #smcd 100 i pull-up vcc 10k ? detects card. smlvd 88 i pull-down ? 100k ? detects low voltage. #smwpd 73 i pull-up vcc 10k ? write-protection seal #smejsw 74 i pull-up vcc 10k ? eject request #smled 107 o (od) pull-up vcc 100k ? turns on the led. #smlock 109 o (od) pull-up vcc 100k ? lock mode #smejct 106 o (od) pull-up vcc 100k ? eject response TC6371AF specification rev. 1.8 02/01/22 total 58 page no.33 toshiba confidential 4.11 ? ? ? ? connection example of sd card/smartmedia? socket it is shown that total 32 signal connections example of TC6371AF which have 8 signals of sd card interface, 1 signal of a power supply control for sd card, 22 signals of smartmedia tm interface and 1 signal of a power supply control for smartmedia tm . as for our company, a movement confirmation of the sd card /smartmedia tm was done by using frs-001-2000-0 and fps009-3000 of theyamaichi company. an outside pull-up/down resistance that is mentioned on an item of the "4.10 pull-up/down resistance" is not shown in a bottom figure. when you design a circuit, please refer to recommended resistance by an item of the "4.10 pull-up/down " and a bottom figure. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? sm-d7 sm-d6 sm-d5 sm-d4 sm-d3 sm-d2 sm-d1 sm-d0 sm-cle sm-ale sm-we sm-re sm-ce sm-wp sm-r/b sm-cd sm-lvd sm-wp-1 sm-wp-2 sm-sw-1 sm-sw-2 sm-vcc sm-vcc sm-vss sm-vss sm-vss smvc3en TC6371AF sdcd3 sdcmd sdclk sdcd0 sdcd1 sdcd2 sdwp #sdcd sdpwr ? ? :: ? ++ ? ? :: ? ? ? ? ? ? ? :: ? ? ? fps009-3000 manufactured by the yamaichi company mic2563 manufactured by the micrel company smd7 smd6 smd5 smd4 smd3 smd2 smd1 smd0 smcle smale #smwe #smre #smce #smwp #smrb #smcd smlvd #smwpd #smejsw #smled #smlock #smejct gnd frs-001-2000-0 manufactured by the yamaichi company TC6371AF specification rev. 1.8 02/01/22 total 58 page no.34 toshiba confidential 4.12 ? ? ? ? processing unused interfaceexternal pins TC6371AF accommodates one port of sd card interface and one port of smartmedia? interface. see descriptions for processing pins in respective sections of interface when dealing with unused external pins for interfaces. 4.12.1 processing pins (smartmedia? interface unsupported) process pins according to the following table when smartmedia? interface is unused (when each signals are not connected to other parts) : name pin i/o process smd7 91 io pull-up resistance for 100k ? smd6 94 io pull-up resistance for 100k ? smd5 96 io pull-up resistance for 100k ? smd4 99 io pull-up resistance for 100k ? smd3 95 io pull-up resistance for 100k ? smd2 93 io pull-up resistance for 100k ? smd1 90 io pull-up resistance for 100k ? smd0 86 io pull-up resistance for 100k ? smcle 75 o (3state) open smale 78 o (3state) open #smce 77 o (3state) open #smwe 80 o (3state) open #smre 79 o (3state) open #smwp 84 o (3state) open #smrb 82 i high smlvd 88 i low #smcd 100 i high #smwpd 73 i high #smejsw 74 i high #smled 107 o (od) open #smlock 109 o (od) open #smejct 106 o (od) open smvc3en 72 o open and, name pin i/o process fcmode 58 i low idsel0 13 i connect to any ad line idsel1 120 i low TC6371AF specification rev. 1.8 02/01/22 total 58 page no.35 toshiba confidential 4.12.2 processing pins (sd interface unsupported) process pins according to the following table when sd interface is unused (when each signals are not connected to other parts): name pin i/o process sdcd3 85 io pull-up resistance for 100k ? sdcd2 83 io pull-up resistance for 100k ? sdcd1 102 io pull-up resistance for 100k ? sdcd0 101 io pull-up resistance for 100k ? sdcmd 89 io pull-up resistance for 100k ? sdclk 98 o low #sdcd 104 i high sdwp 105 i low sdpwr 69 o open and, name pin i/o process fcmode 58 i low idsel0 13 i low idsel1 120 i connect to any ad line TC6371AF specification rev. 1.8 02/01/22 total 58 page no.36 toshiba confidential 4.13 ? ? ? ? #smled signal TC6371AF has the #smled signal for smartmedia interface. it is recommended that this signal is used for access led, for example reading and writing. this signal is controlled by setting mode register(offset:04h) of smartmedia control register. when mode register is written 04h, #smled becomes low and led turns on. in reverse, in the case of being written 00h, #smled becomes high and led turns off. 4.14 ? ? ? ? gpio interface specification tc6380af holds 8 pins(gpio[7:0] signals) as general port. as gpio[7:4] signals are input ones, please use them as fixed values with referring to page 14. it shows a usage method of gpio[3:0] signals. gpio[3:0] signals can be output by setting 1b to d5 of monitor select register(config offset:ffh) of smartmedia host controller register. gpio3 signal can be controlled by d3 of monitor select register, gpio2 signal can be controlled by d2 of monitor select register, gpio1 signal can be controlled by d3 of monitor select register and gpio0 signal can be controlled by d0 of monitor select register. as of january. 2002, the sd/mmc/smartmedia driver does not perform any functions by controlling gpio signals. #smled TC6371AF vcc vcc TC6371AF specification rev. 1.8 02/01/22 total 58 page no.37 toshiba confidential 5 electrical characteristics 5.1 absolute maximum ratings absolute maximum ratings symbol parameter min max unit condition note vcc supply voltage range -0.3 5.0 v gnd = 0v 1 vin3 input voltage (3.3v) -0.3 vcc+0.3 v gnd = 0v vout output voltage -0.3 vcc+0.3 v gnd = 0v tstg storage temperature range -40 125 c note 1: vcc power supply (caution) the absolute maximum ratings indicate a level at which permanent damage to the device may occur if those ratings are exceeded and are not intended to provide a guarantee that damage will not occur by staying within the level of the ratings. 5.2 dc characteristics 5.2.1 power supply voltage: recommended conditions power pin parameter min typ max unit note vcc supply voltage for core logic 3.0 3.3 3.6 v topr ambient temperature under bias 0 25 70 c TC6371AF specification rev. 1.8 02/01/22 total 58 page no.38 toshiba confidential 5.2.2 pci interface dc characteristics pci interface dc characteristics at 3.3 v operation. symbol parameter min max unit test condition note vih input high voltage 0.5vcc vcc+0.5 v 1-1 vil input low voltage -0.5 0.3vcc v 1-1 vih input high voltage 0.7vcc vcc+0.5 v 1-2 vil input low voltage -0.5 0.2vcc v 1-2 voh output high voltage 0.9vcc ? v iout=-500 a 1-3 vol output low voltage ? 0.1vcc v iout=1500 ? 1-4 switching current high 1 -12vcc ? ma vout=0.3vcc 1-3 ioh switching current high 2 ? -32vcc ma vout=0.7vcc 1-3 switching current low 1 16vcc ? ma vout=0.6vcc 1-4 iol switching current low 2 ? 38vcc ma vout=0.18vcc 1-4 iilk input leakage current -10 10 a 0 TC6371AF specification rev. 1.8 02/01/22 total 58 page no.44 toshiba confidential 5.3 ac characteristics 5.3.1 pci interface signal ac characteristics pci clock ac characteristics (vcc = 3.0-3.6v , ta=0-70c) symbol parameter min max unit notes pciclk tcyc clk cycle time 30 ns thigh clk high time 11 ? ns tlow clk low time 11 ? ns t1d slew rate, pciclk rising edge 1 4 v/ns t1e slew rate, pciclk falling edge 1 4 v/ns pciclk timin g pciclk tcyc tlow thigh t1e t1d 0.4vcc p-to-p min 0.7vcc 0.2vcc TC6371AF specification rev. 1.8 02/01/22 total 58 page no.45 toshiba confidential pci reset ac characteristics (vcc=3.0-3.6v, ta=0-70c) symbol parameter min max unit notes #pcirst trst reset active time after power stable 1 ms trst-clk reset active time after clk stable 100 s pci reset timing #pcirst pciclk trst trst-clk power 0.4vcc 0.4vcc 0.4vcc pci reset timing TC6371AF specification rev. 1.8 02/01/22 total 58 page no.46 toshiba confidential pci interface output ac characteristics (vcc=3.0-3.6v, ta=0-70c) symbol parameter min max unit notes ad[31:0], #cbe[3:0], par, #devsel, #trdy, #stop, #clkrun tval clk to signal valid delay-bused signals 2 11 ns cl=10pf ton float to active delay 2 ? ns toff active to float delay ? 28 ns pci output signals timing toff ton 0.4vcc tval 0.285vcc:rise edge, 0.615vcc:fall edge output (shared) pciclk output pci output signal timing TC6371AF specification rev. 1.8 02/01/22 total 58 page no.47 toshiba confidential pci interface input signal ac characteristics (vcc=3.0-3.6v, ta=0-70c) symbol parameter min max unit notes ad[31:0], #cbe[3:0], #frame, #irdy, #clkrun, idsel0, idsel1 tsu input setup time to clk-bused signals 7 ? ns th input hold time from clk 0 ? ns pci input signals timing th 0.4vcc tsu input pciclk 0.4vcc pci input signals timing TC6371AF specification rev. 1.8 02/01/22 total 58 page no.48 toshiba confidential 5.3.2 smartmedia? interface signal ac characteristics (vcc=3.0-3.6v, ta=0-70c) symbol parameter min max unit t cls smcle setup time 20 ? ns t clh smcle hold time 40 ? ns t cs #smce setup time 20 ? ns t ch #smce hold time 40 ? ns t wp #smwe pulse width 2pciclk 6pciclk ns t als smale setup time 20 ? ns t alh smale hold time 40 ? ns t ds data setup time 30 ? ns t dh data hold time 20 ? ns t wh #smwe high hold time 3pciclk ? ns t ww #smwp high to #smwe low 100 ? ns t rr ready to #smre low 20 ? ns t rp read pulse width 3pciclk 6pciclk ns t rc read cycle time 80 ? ns t ceh #smce high hold time(at the last serial read) 250 ? ns t reh #smre high hold time 2pciclk ? ns t ir output hi-z to #smre low 0 ? ns t whc #smwe high to #smce low 50 ? ns t whr #smwe high to #smre low 60 ? ns t ar1 smale low to #smre low(address register read, id read) 200 ? ns t cr #smce low to #smre low(data register read ,id read) 200 ? ns ac test conditions parameter 3.3v model input pulse level 0.4v 2.4v input comparison level 1.5v / 1.5v output data comparison level 1.5v / 1.5v output load 1ttl gate and cl=100pf TC6371AF specification rev. 1.8 02/01/22 total 58 page no.49 toshiba confidential command cycle timing command cycle signals timing t cls #smce smcle #smwe t cs t clh t ch t wp smale t als t alh smd0-7 t ds t dh serial read cycle timing serial read cycle signals timing #smce #smre t reh smd0-7 t rc t rp #smrb t rr TC6371AF specification rev. 1.8 02/01/22 total 58 page no.50 toshiba confidential address cycle timing address cycle signals timing t cls #smce smcle #smwe t cs t wp smale t als t alh smd0-7 t ds t dh t wc t wh t wp t wh t wp t wc t ds t dh t ds t dh status read cycle timing status read cycle signals timing # smwe smd0-7 # smrb smcle # smce t cls t cs t clh t wp t ch t whc # smre t cls t whr t ds t dh TC6371AF specification rev. 1.8 02/01/22 total 58 page no.51 toshiba confidential data write cycle timing data write cycle signals timing t clh # smce smcle # smwe t ch t wp smale t als smd0-7 t ds t dh t wc t wh t wp t wh t ds t dh t ds t dh reset cycle timing reset cycle signals timing # smce smd0-7 smale smcle t cls t cs t wp t clh t ch smd0-7 # smrb # smwp t als t alh t ds t dh t ww t ww TC6371AF specification rev. 1.8 02/01/22 total 58 page no.52 toshiba confidential read cycle timing read cycle timing #smwe #smre smd0-7 smcle #smce smale kkkk kkkk kkkk kkkk ? kkkk kkkk kkkk kkkk ? #smrb t rc t rb t wb ceh t t alh t dh t ds read cycle timing in case #smce is set to high read cycle timing in case # smce is set to high #smwe #smre smd0-7 smcle #smce smale kkkk kkkk kkkk kkkk ? kkkk kkkk kkkk kkkk ? #smrb t rc t wb t alh t dh t ds TC6371AF specification rev. 1.8 02/01/22 total 58 page no.53 toshiba confidential id read timing id read timing #smwe #smre smd0-7 smcle #smce smale 90h 00 t cls t cs t ch t alh t als t cr t t dh t ds id read command address input maker code output device code output ar1 sequential read timing sequential read timing #smwe ? #smre smd0-7 smcle #smce smale #smrb 00h ca0-7 pa0-7 pa8-15 pa16-23 n n+1 n+3 527 0 1 2 527 column address n page address m page m access page m+1 access 512+16byte/page dout527 TC6371AF specification rev. 1.8 02/01/22 total 58 page no.54 toshiba confidential auto page program timing auto page program timing #smwe #smre smd0-7 smcle #smce smale #smrb 00h ca0-7 pa0-7 pa8-15 pa16-23 din din din 10h 70h #smwp status output status read command serial data input command t ww auto program command 512+16byte/page dout527 auto block erase timing auto block erase timing #smwe #smre smd0-7 smcle #smce smale #smrb pa0-7 pa8-15 pa16-23 d0h #smwp status output status read command 60h 70h erase command auto block erase setup command busy TC6371AF specification rev. 1.8 02/01/22 total 58 page no.55 toshiba confidential 5.3.3 sd card interface signal ac characteristics (vcc=3.0-3.6v, ta=0-70c) symbol parameter min max unit notes sdcd[3:0], sdcmd, sdclk fpp clock frequency data transfer mode 0 16 mhz cl=25pf fod clock frequency identification mode 0 256 khz cl=25pf twl clock low time 30 ? ns cl=25pf twh clock high time 30 ? ns cl=25pf ttlh clock fall time ? 10 ns cl=25pf tthl clock rise time ? 10 ns cl=25pf tisu input set-up time 10 ? ns cl=25pf tih input hold time 10 ? ns cl=25pf todly output delay time ? 25 ns cl=25pf sd card interface signals timing sd card interface signals timing sdclk (output) fpp, fod input output twl twh tthl ttlh tisu tih todly (max) todly (min) 0.75vcc 0.125vcc vol=0.125vcc, voh=0.75vcc TC6371AF specification rev. 1.8 02/01/22 total 58 page no.56 toshiba confidential 5.3.4 system interface signal ac characteristics clk32 ac characteristics (vcc=3.0-3.6v, ta=0-70c) symbol parameter min max unit notes clk32 tcyc32 clk cycle time 31 s thigh32 clk high time 11 ? s tlow32 clk low time 11 ? s t1d32 slew rate, clk32 rising edge 10 ? ns t1e32 slew rate, clk32 falling edge 10 ? ns clk32 timin g clk32 tcyc32 tlow32 thigh32 t1e32 t1d32 vcc-0.6 0.6 TC6371AF specification rev. 1.8 02/01/22 total 58 page no.57 toshiba confidential 6 package outline TC6371AF specification rev. 1.8 02/01/22 total 58 page no.58 toshiba confidential ? toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in g eneral can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibi lity of the buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, a nd to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury o r damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handlin g guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc.. ? the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfun ction o r failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energ y control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion cont rol instruments, medical instruments, all types of safety devices, etc.. unintended usage of toshiba products listed in this docume n t shall be made at the customer?s own risk. ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assume d b y toshiba corporation for any infringements of intellectual property or other rights of the third parties which may result from i ts use. no license is granted by implication or otherwise under any intellectual property or other rights of toshiba corporation o r others. ? the information contained herein is subject to change without notice. 000707 eaa1 |
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